6.1. Real-Time Mode
    6.2. Storage Mode
    6.3. Control Protocol
    6.4. Frame Structure: Real-Time Mode
    6.5. Sample Rate: Real-Time Mode
    6.6. Frame Structure: Storage Mode
    6.7. Sample Rate: Storage Mode
    6.8. CRC16 (Cyclical Redundancy Check) used in Storage Mode
        6.8.1. Comparison of Raw Calculation CRC & Lookup Table CRC
    6.9. Frame Structure: Control Protocol

There are two main communication protocols: real-time and storage. Note there is an additional communication protocol required to control the PIC (e.g. change sample rate, change from real-time to storage, etc…).  Because RS232 has separate transmit and receive lines, there is no chance of a collision with the real-time / storage data. Let’s call this additional communication protocol the ‘control’ protocol, note an interrupt (or PIC must check UART buffer regularly) must be setup in the PIC to let it know that there is a control message waiting to be read.

6.1. Real-Time Mode

Reads one sample at a time sending each reading directly to the PC using RS232, note there is a delay (real-time clock) between readings which is specified by the PC using the ‘control’ protocol.

Figure 6.1a. Illustration of real-time mode with one channel

From figure 6.1b it is clear that timing is a big problem, as there are time delays for reading each analogue channel and transmitting the data. This problem is worse at high sample frequencies and one solution is to work around the problem and try to software offset the waveforms to compensate for these time delays. Another option is to use four PICs hence sampling can occur simultaneously, and use a master/slave communication protocol with some why of synchronising all the PICs. PIC microcontrollers are so cheap that this is a real option and was considered, multiple PICs in designs are widely used, unlike microprocessor design were it is usually expected that one microprocessor will control everything (e.g. PC, although there are lots of MPUs in a modern PC besides the Pentium).

Figure 6.1c illustrates sampling four channels in the real-time mode using alternate sampling. Channel 1 is sampled 1000-times, then channel 2 is sampled 1000-times, then channel 3 is sampled 1000-times, then channel 4 is sampled 1000-times and the process repeats forever.

Figure 6.1c. Illustration of real-time mode with four channels (alternate mode)

The advantage of using alternate sampling is that all channels can be sampled at the maximum sample rate, while in chop mode each channel must share the RS232 throughput (RS232 bottleneck), for example say the maximum sample rate was 4KHz (set by the maximum RS232 frame structure throughput), one channel enabled would have a max sample rate of 4KHz, two channels enabled would have a max sample rate of 2KHz each, four channels enabled would have a max sample rate of 1KHz each.

But alternate has a disadvantage; timing information between different channels (e.g. channel 1 leads channel 2 by 25ms) is lost. It is possible to software correct this problem, for example using one of the PICs real-time timers it is known how mush time as elapsed between the sampling of channels, this information could be transmitted to the PC Scope program which then draws waveforms with the correct time gap between channels. Another disadvantage is that continuous monitoring is impossible as there are gaps in channel data (e.g. continuous monitoring required for an ECG signal).  It is clear that alternate mode is only useful for periodical waveforms (e.g. sinewave), else chop mode should be used.

6.2. Storage Mode

Read a finite number of samples, storing them into RAM (external RAM chip). The readings are then transferred to the PC in one large block, hence removing the RS232 bottleneck and providing faster sample rates.

Figure 6.2a. Illustration of storage mode with one channel

Figure 6.2b. Illustration of storage mode with four channels (chop mode)

Alternate sampling can applied to storage mode, but there is no real advantage over chop mode. Recall that the main reason of having alternate mode was to maximise the sample rate of each channel in the real-time mode. This no longer apples as storage mode removes the RS232 bottleneck, the new bottleneck is now the speed of the PICs ADC, hence alternate mode cannot increase channel sample rates.

6.3. Control Protocol

The PIC checks the UART buffer regularly (or UART interrupt) checking to see if a control message is being received. Once a control message has been detected, the PIC leaves the main program and checks (CRC check) that the message is valid, if not return to the main program, if valid decode and implement the message. This process is illustrated in figure 6.3a.

Figure 6.3a. Illustration of the control protocol

6.4. Frame Structure: Real-Time Mode

10-bit ADC, hence 2-bytes are sent per reading.

Figure 6.4a. Frame structure: Real Time.

If A = 0, byte 1 which contains data d9...d5 (Upper 5-bits of ADC reading).

If A = 1, byte 2 which contains data d4…d0 (Lower 5-bits of ADC reading).

B & C specify what channel the data is for.

Yes this is partly true; however the only data of real value is the ADC readings, the reset are for identification purposes only. Hence the real efficiency of this frame structure is (10 data bits, 16 bits in total, hence efficiency = 10/16 x 100) 62.5%.

 It is theoretically possible to use a frame structure that is 100% efficient, but this requires (because there is no identification code) extremely good synchronisation between the PC and the PIC. The main problem with this is that if a byte is lost (due to noise, bad line, buffer overflow, etc…) it would be extremely difficult to recover. The other option is to have the PC request each and every reading (Master/Slave), the problem with this is that there is a delay sending the request to the PIC and a processing delay hence this method would be much slower in reality.

Figure 6.4b. Real-time frame structure example, channel 4 reads 564d (10,0011,0100b) from ADC

Notice there is no check sum or CRC, the reason for this is to maximise the data throughput. Clearly there is a problem; however the frame structure is designed in such a way that some errors can be detected. Note the cable between the MAX232 buffer (connect to PIC) and the PC will be high quality cable (short length) and errors should not occur that frequently anyway.

A few rules that must occur for the frame to be valid (non-valid frames are flushed): -

1.      Byte 1 is always followed by byte 2 for a particular channel.

E.g. B1_CH1 ß B2_CH1 ß B1_CH3 ß B2_CH3 ß ….              OK

2.      Channel readings can occur in any order as long as byte 2 follows byte 1.

E.g. B1_CH3 ß B2_CH3 ß B1_CH2 ß B2_CH2 ß …

If one or two readings are lost, it should not affect the appearance of the waveform too much, as there are at least 10 readings per cycle and probably at lot more at high sampling rates. Also because it is real-time the screen is continuously refreshed, hence the error will probably not stay on the screen for very long (a couple of milliseconds) until it is replaced by new readings.

6.5 Sample Rate: Real-Time Mode

The RS232 communications is the bottleneck as the maximum sampling frequency of PIC16F877 microcontroller ADC is higher than can be transmitted over RS232. Therefore it makes since to calculate the maximum sample rate based on how much data can be transmitted through RS232 at different baud rates.

Two bytes are sent per frame, note each byte contains 8-bits plus a start and stop bit. Hence 20-bits are sent per reading.

Figure 6.5a. Table showing the theoretical real-time sample rates (chop, 10-bit ADC).

Note that the values shown in Figure 6.5a assume that there is no time delay between readings. Clearly this is not the case in practice and the actual maximum sample rates will be lower than specified e.g. PIC takes 19.72μS (see datasheet for PIC16F877) to acquire each sample, plus there will be processing delays. However these values should be reasonably accurate because the hardware UART is being used, hence the PIC can sample the next reading while the UART is transmitting the last reading.

Note if alternating sampling (not chop) is used the sample rate will not decrease with the number of channels, for example figure 6.5a states that the maximum sample rate for one channel at 115 kbps is 5.75 KHz, if alternate mode is used this maximum sampling rate still applies even if 4 channels are enabled. Recall that alternate mode is only useful for periodical waveforms.

The PIC16F877 has an 10-bit ADC, if speed is important the resolution could be reduced to 8-bits when sampling four channels. For example channels 1,2,3,4 are always transmitted along with sync frame (5-bytes for 4 channels, 80% efficient), hence the following sample rates are now possible: -

Figure 6.5b. Table showing the theoretical real-time sample rates (chop, 8-bit ADC).

Figure 6.5c. Table showing the theoretical real-time sample rates (chop, 10-bit ADC, dual RS232 cable).

For faster sample rates, storage mode must be used, for example the PIC samples a waveform at 20 KHz storing each reading into an array (e.g. external RAM chip). Then once a certain number of samples have been taken (say 200) the PIC stops sampling and sends the readings to the PC (via RS232) in one large block (including CRC or check sum), once ACK (Acknowledgement) is received from the PC the PIC starts sampling again and the process repeats forever. Another option is to use a different transport medium (e.g. USB / Parallel) which would allow for faster real-time sample rates.

Note the real-time communication protocol does not rely on the transport medium, hence if the transport medium is changed the real-time protocol should be OK. Expect for maybe USB as USB ports can be shared with other devices (many devices connected to the same port e.g. printer, scanner, mouse, etc…) hence the communication protocol must be compliant with the USB standard.

6.6. Frame Structure: Storage Mode

Figure 6.6a shows the frame structure for the storage mode, each field is 1 byte in size, expect for the ‘data’ field which is variable and its size is specified in the ‘count’ field.

Since each frame could contain up to 255 data bits (large block of data) it is much more likely that an error will error when compared to the short real-time frames.  Hence the need for error detection, at present a 16-bit CRC is included in the frame which will detect almost every possible error (including burst errors).

But the generation of the CRC is processor hungry; at first it was thought that it may not be suitable with the PIC. Although it is possible to generate the CRC using a lookup table, this reduces processor load, but this lookup table uses a lot of RAM.

The plan is to use a 16-bit CRC for error detection, as this practically guarantees that all errors are detected. But if it turns out that it is impractical to implement on the PIC, a simple checksum will be used instead, but the disadvantage of this is that not all errors will be detected (burst errors will be a problem).  Note all fields in the frame are included in the CRC (or maybe checksum) calculation e.g. SOF, COUNT, and DATA[i] … DATA[n].

The ‘data’ field uses the same frames as specified for the real-time frame structure. The big advantages of this is that the code reusable e.g. subroutines/functions can be written and used in the real-time and storage modes.

There are two options for checking if the frame is correct: -

1.      Calculated the CRC for the received frame and compare with the received CRC.

2.      Send the entire frame to the CRC function (including received CRC) and if the calculated CRC is zero then the frame is correct.

6.7. Sample Rate: Storage Mode

Since operating in storage mode, the maximum sampling rate is only limited by the maximum sampling rate of the PIC ADCs and not the RS232 link. The datasheet for the PIC16F877 specifies acquisition time (TACQ): -

            TACQ   = Amplifier Setting Time + Hold Capacitor Charging Time + Temperature Coefficient

                        = T_AMP + T_C + T_COFF

                        = 2μS + T_C + [(Temperature – 25^oC)(0.05μS/^oC)]

            T_C         = C_HOLD (R_IC + R_SS + R_S) ln(1/2047)

                        = -120pF(1kΩ + 7kΩ +10kΩ) ln(0.0004885)

                        = 16.47μS

            TACQ   = 2μS + 16.47μS + [(50^oC – 25^oC)(0.05μS/^oC)]

                        = 19.72μS

Therefore theoretically the PICs ADC can sample at (1/19.72μS) 50.7 KHz. But according to the datasheet “after a conversion has completed, a 2.0 T_AD delay must be complete before acquisition can begin again. During this time, the holding capacitor is not connected to the selected A/D input channel.” [D1]

T_AD is defined as the A/D conversion time per bit. For correct A/D conversions, the A/D conversion clock (T_AD) must be selected to ensure a minimum T_AD time of 1.6µs. Assuming a minimum A/D conversion clock (T_AD) time of 1.6 µS (e.g. the PIC is running at 20 MHz with 32TOSC selected for T_AD), the maximum sample rate is: -

For faster sample rates an external ADC with direct memory access is required.

6.8. CRC16 (Cyclical Redundancy Check) used in Storage Mode

Procedure: -

1.      Load a 16-bit register with FFFF hex (all ‘1’s). Call this the CRC register.

2.     Exclusive OR the first 8-bit bytes of the message with the low order byte of the 16-bit CRC register, putting the result in the CRC register.

3.     Shift the CRC register one bit to the right, zero-filling the MSB. Extract and examine the LSB.

4.      If the LSB was 0:     Do nothing – proceed to step 5.
If the LSB was 1:     EXOR the CRC register with the polynomial value 0xA001.

5.     Repeat steps 3 and 4 until 8 shifts have been performed. When this is done, a complete 8-bit byte will have been processed.

6.     Repeat steps 2 through 5 for the next 8-bit byte of the message. Continue doing this until all the bytes have been processed.

7.      The final content of the CRC register is the CRC value.

8.      Swap low & high bytes of CRC, Return CRC.

C code for producing CRC (pure calculation, no lookup table, PC Code): -

C code for producing CRC (using lookup table): -

Example CRC calculation: -